Direct Current Link Circuit

An electronic circuit comprising:

• positive and negative input terminals adapted to be connected across a floating source of direct current (DC) power;
• positive and negative output terminals;
• first and second field effect transistors each comprising an integral diode, wherein the first and second field effect transistors are connected in series across the positive and negative input terminals, and wherein a connection point between the first and second field effect transistors forms a first node;
• first and second diodes connected in series, wherein a connection point between the first and second diodes forms a second node;
• a first resonant circuit connected in series between the first and second nodes, wherein, when the first field effect transistor is closed and the second field effect transistor is open, the first resonant circuit is connected across the positive and negative input terminals through the first diode, and wherein, when the first field effect transistor is open and the second field effect transistor is closed, the positive and negative output terminals and the first resonant circuit are connected in series across the positive and negative input terminals through the second diode;
• third and fourth field effect transistors each comprising an integral diode, wherein the third and fourth field effect transistors are connected in series across the positive and negative input terminals, and wherein a connection point between the third and fourth field effect transistors forms a third node;
• third and fourth diodes connected in series, wherein a connection point between the third and fourth diodes forms a fourth node;
• and
• a second resonant circuit connected in series between the third and fourth nodes, wherein, when the third field effect transistor is closed and the fourth field effect transistor is open, the second resonant circuit is connected across the positive and negative input terminals through the third diode, wherein, when the third field effect transistor is open and the fourth field effect transistor is closed, the positive and negative output terminals and the second resonant circuit are connected in series across the positive and negative input terminals through the fourth diode, wherein the first and fourth field effect transistors are configured to be opened and closed together, and wherein the second and third field effect transistors are configured to be opened and closed together.

A method comprising:

• connecting a floating source of a direct current (DC) power across positive and negative input terminals of a circuit, the circuit comprising:
• a dual DC output comprising positive and negative output terminals referenced to a ground output terminal;
• first and second field effect transistors each comprising an integral diode, wherein the first and second field effect transistors are connected in series across the positive and negative input terminals, and wherein a connection point between the first and second field effect transistors forms a first node,
• first and second diodes connected in series, wherein a connection point between the first and second diodes forms a second node,
• a first resonant circuit connected in series between the first and second nodes, wherein, when the first field effect transistor is closed and the second field effect transistor is open, the first resonant circuit is connected across the positive and negative input terminals through the first diode, and wherein, when the first field effect transistor is open and the second field effect transistor is closed, the positive and negative output terminals and the first resonant circuit are connected in series across the positive and negative input terminals through the second diode,
• third and fourth field effect transistors each comprising an integral diode, wherein the third and fourth field effect transistors are connected in series across the positive and negative input terminals, and wherein a connection point between the third and fourth field effect transistors forms a third node,
• third and fourth diodes connected in series, wherein a connection point between the third and fourth diodes forms a fourth node, and
• a second resonant circuit connected in series between the third and fourth nodes, wherein, when the third field effect transistor is closed and the fourth field effect transistor is open, the second resonant circuit is connected across the positive and negative input terminals through the third diode, wherein, when the third field effect transistor is open and the fourth field effect transistor is closed, the positive and negative output terminals and the second resonant circuit are connected in series across the positive and negative input terminals through the fourth diode, wherein the first and fourth field effect transistors are configured to be opened and closed together, and wherein the second and third field effect transistors are configured to be opened and closed together;
• and
• alternately gating the first and second field effect transistors such that the first field effect transistor is closed and the second field effect transistor is open during a first phase of a pulse width modulation (PWM) cycle thereby charging the first resonant circuit from the floating source of DC power, and such that the first field effect transistor is open and the second field effect transistor is closed during a second phase of the PWM cycle thereby discharging the first resonant circuit to provide converted power to a load connected to the positive output terminal, the negative output terminal, and the ground output terminal.

An electronic circuit comprising:

• positive and negative input terminals adapted to be connected across a floating source of direct current (DC) power;
• positive and negative output terminals;
• first and second field effect transistors connected in series across the positive and negative input terminals, wherein a connection point between the first and second field effect transistors forms a first node;
• first and second diodes connected in series, wherein a connection point between the first and second diodes forms a second node;
• a first resonant circuit connected in series between the first and second nodes, wherein, when the first field effect transistor is closed and the second field effect transistor is open, the first resonant circuit is connected across the positive and negative input terminals through the first diode, and wherein, when the first field effect transistor is open and the second field effect transistor is closed, the positive and negative output terminals and the first resonant circuit are connected in series across the positive and negative input terminals through the second diode;
• third and fourth field effect transistors connected in series across the positive and negative input terminals, wherein a connection point between the third and fourth field effect transistors forms a third node;
• third and fourth diodes connected in series, wherein a connection point between the third and fourth diodes forms a fourth node;
• and
• a second resonant circuit connected in series between the third and fourth nodes, wherein, when the third field effect transistor is closed and the fourth field effect transistor is open, the second resonant circuit is connected across the positive and negative input terminals through the third diode, wherein, when the third field effect transistor is open and the fourth field effect transistor is closed, the positive and negative output terminals and the second resonant circuit are connected in series across the positive and negative input terminals through the fourth diode, wherein gates of the first and fourth field effect transistors are configured to be driven by a first drive signal, and wherein gates of the second and third field effect transistors are configured to be driven by a second drive signal.