Liquid Crystal Display Panel, Array Substrate And Manufacturing For The Same
AssigneeShenzhen China Star Optoelectronics Technology Co., Ltd.
InventorSikun HAO
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Abstract
A liquid crystal display panel, an array substrate and a manufacturing method for the same are provided. Designing a black matrix for light shielding, and an insulation layer between a pixel electrode and other structures in order to reduce the type and the number of the masks, simplify the manufacturing process and decrease the production cost. Besides, a distance between the black matrix located above a data line and the data line is shorten such that lights of a pixel emitting out through an adjacent pixel is avoided in order to reduce the light leakage at a large viewing angle.
Claims13
A manufacturing method for an array substrate, comprising:
- sequentially forming a gate electrode, an insulation layer and an active semiconductor layer on a base substrate;
- forming a source electrode and a drain electrode on the active semiconductor layer;
- forming a data line on the insulation layer;
- forming a planarization passivation layer on the source electrode, the drain electrode, the data line and the insulation layer, and the planarization passivation layer is provided with a first contact hole that reveals a surface of the drain electrode;
- forming a black matrix on the planarization passivation layer, wherein, the black matrix includes a first region and a second region, the first region of the black matrix is correspondingly located above the source electrode and the drain electrode, the second region of the black matrix is correspondingly located above the data line, and the first region of the black matrix is provided with a second contact hole communicated with the first contact hole;
- forming a pixel electrode on the first region of the black matrix, and inside the first contact hole and the second contact hole, and the pixel electrode is electrically connected to drain electrode through the first contact hole and the second contact hole;
- and
- forming a common electrode on the second region of the black matrix, and the common electrode and the pixel electrode are arranged alternately on the array substrate.
An array substrate, wherein, the array substrate includes:
- a base substrate;
- a gate electrode, an insulation layer and an active semiconductor layer sequentially formed on a base substrate;
- a source electrode and a drain electrode formed on the active semiconductor layer;
- a data line formed on the insulation layer;
- a planarization passivation layer formed on the source electrode, the drain electrode, the data line and the insulation layer, and the planarization passivation layer is provided with a first contact hole that reveals a surface of the drain electrode;
- a black matrix formed on the planarization passivation layer, wherein, the black matrix includes a first region and a second region, the first region of the black matrix is correspondingly located above the source electrode and the drain electrode, the second region of the black matrix is correspondingly located above the data line, and the first region of the black matrix is provided with a second contact hole communicated with the first contact hole;
- a pixel electrode formed on the first region of the black matrix, and inside the first contact hole and the second contact hole, and the pixel electrode is electrically connected to drain electrode through the first contact hole and the second contact hole;
- and
- a common electrode formed on the second region of the black matrix, and the common electrode and the pixel electrode are arranged alternately on the array substrate.
A liquid crystal display panel, wherein, the liquid crystal display panel comprises a first substrate and a second substrate which are disposed at an interval and a liquid crystal filled between the first substrate and the second substrate, wherein, one of the first substrate and the second substrate is an array substrate, and the array substrate comprises:
- a base substrate;
- a gate electrode, an insulation layer and an active semiconductor layer sequentially formed on a base substrate;
- a source electrode and a drain electrode formed on the active semiconductor layer;
- a data line formed on the insulation layer;
- a planarization passivation layer formed on the source electrode, the drain electrode, the data line and the insulation layer, and the planarization passivation layer is provided with a first contact hole that reveals a surface of the drain electrode;
- a black matrix formed on the planarization passivation layer, wherein, the black matrix includes a first region and a second region, the first region of the black matrix is correspondingly located above the source electrode and the drain electrode, the second region of the black matrix is correspondingly located above the data line, and the first region of the black matrix is provided with a second contact hole communicated with the first contact hole;
- a pixel electrode formed on the first region of the black matrix, and inside the first contact hole and the second contact hole, and the pixel electrode is electrically connected to drain electrode through the first contact hole and the second contact hole;
- and
- a common electrode formed on the second region of the black matrix, and the common electrode and the pixel electrode are arranged alternately on the array substrate.
Dependencies are inferred from the claim text.