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US 2017/0250161 A1Published application
Correction Die for Wafer/Die Stack
AssigneeInvensas Corporation
InventorBelgacem Haba
Life of this patent
Estimating the term…
Abstract
Representative implementations of devices and techniques provide correction for a defective die in a wafer-to-wafer stack or a die stack. A correction die is coupled to a die of the stack with the defective die. The correction die electrically replaces the defective die. Optionally, a dummy die can be coupled to other die stacks of a wafer-to-wafer stack to adjust a height of the stacks.
Claims20
A microelectronic assembly, comprising:
- a plurality of semiconductor dies coupled in a die stack, a quantity of the dies of the die stack preselected to include at least one additional die more than required for a predetermined capacity of the die stack, at least one of the dies in the die stack being a non-operating die, a die configured for non-use, or a die used only to electrically couple together two other dies in the die stack, and at least one die in the die stack is configured as a correction die to compensate for a non-operating die in the stack.
(canceled)
A microelectronic arrangement, comprising:
- a plurality of semiconductor wafers coupled in a wafer-to-wafer stack, each wafer including a plurality of dies, the wafers aligned such that the plurality of dies of each wafer couple to form a plurality of die stacks, each die stack aligned along an axis generally transverse to a plane of at least one of the wafers;
- one or more additional dies coupled to dies of one or more die stacks to form one or more modified stacks, one or more of the plurality of dies and the one or more additional dies of each of the modified stacks including at least one non-operating die;
- and
- one or more correction wafers coupled to a wafer of the wafer-to-wafer stack, the one or more correction wafers including the one or more additional dies, the one or more correction wafers aligned such that the one or more additional dies couple to dies of the plurality of die stacks.
1 more element
(canceled)
A method, comprising:
- coupling a plurality of wafers in a wafer-to-wafer stack, each wafer including a plurality of dies;
- aligning the wafers such that the plurality of dies of each wafer couple to form a plurality of die stacks;
- identifying a defective die within a die stack;
- and
- coupling a correction die to a die of the die stack with the defective die.
2 more elements
Dependencies are inferred from the claim text.