Dynamic Clock Divide for Current Boosting
AssigneeDialog Semiconductor (UK) Limited
InventorsMark Childs, Jens Masuch
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Abstract
In order to accelerate the response of buck converters to load transients buck converters having asymmetric phase designs having a load step detection are used. When a relatively large and fast load step is detected, the clock frequency of “fast” valley mode phases is reduced, which are populated with fast, low value inductors. The clock frequency is returned to its normal rate when the current in the “slow” phases has reached a suitable level.
Claims17
Method to improve load transient response of a switched multiphase buck converter, comprising:
- (1) providing a switched multiphase DC-to-DC converter, comprising one or more fast phases with inductors having low inductance, one or more slow phases with inductors having higher inductance, compared to the fast phases, having relative high inductance, a circuit to detect if an output current of a slow phase has reached a maximum limit, a load step detection unit to detect if a load step at the output of the DC-to-DC converter has occurred and a frequency divider unit, which is configured to reduce a clock frequency;
- (2) reducing a clock frequency of said one or more fast phases upon detection of a load step;
- and
- (3) returning said clock frequency to its normal rate once a current in said one or more fast phases reaches a predetermined level.
A multiphase switching DC-to-DC converter with improved load transient response, comprising:
- one or more fast slave phases with inductors having low inductance;
- and
- one or more slow slave phases with inductors, compared to the fast slave phases, having relative high inductance;
- wherein said multiphase switching converter is configured to reduce a clock frequency of said one or more fast phases upon detection of a load step, and to return said clock frequency to its normal rate once a current in said one or more fast phases reaches a predetermined level.
A multiphase switching DC-to-DC converter with improved load transient response, comprising:
- multiple phases;
- and
- wherein said multiphase switching converter is configured to reduce a clock frequency of one or more of said multiple phases upon detection of a load step, and to return said clock frequency to its normal rate once a current in said one or more of said multiple phases reaches a predetermined level.
Dependencies are inferred from the claim text.