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US 2016/0365740 A1Published application
Power System for multi-voltage levels
AssigneeLeadot Innovation, Inc.
InventorJustin Wang
Life of this patent
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Abstract
Power system includes a power connector, a voltage detecting unit, a cell array, and a micro-controller unit. The power connector is used for providing at least one output voltage. The voltage detecting unit is coupled to the power connector for detecting voltage levels of at least one output voltage. The cell array is coupled to the power connector for providing energy of at least one output voltage. The cell array includes M cell packs coupled in parallel. Each cell pack includes six transistors and a power storage unit. The micro-controller unit is coupled to the voltage detecting unit and the cell array for controlling each transistor in all cell packs.
Claims12
A power system, comprising:
- a power connector configured to provide at least one output voltage;
- a voltage detecting unit coupled to the power connector and configured to detect voltage levels of the at least one output voltage;
- a cell array coupled to the power connector and configured to provide energy of the at least one output voltage, the cell array comprising M cell packs coupled in parallel, each cell pack comprising:
- a first transistor comprising:
- a first terminal;
- a control terminal configured to receive a first control signal;
- and
- a second terminal;
- a second transistor comprising:
- a first terminal coupled to the first terminal of the first transistor;
- a control terminal configured to receive a second control signal;
- and
- a second terminal;
- a third transistor comprising:
- a first terminal;
- a control signal configured to receive a third control signal;
- and
- a second terminal coupled to the second terminal of the second transistor;
- a fourth transistor comprising:
- a first terminal coupled to a second high voltage terminal;
- a control terminal configured to receive a fourth control signal;
- and
- a second terminal coupled to the second terminal of the first transistor;
- a fifth transistor comprising:
- a first terminal coupled to the second terminal of the fourth transistor;
- a control terminal configured to receive a fifth control signal;
- and
- a second terminal;
- a power storage unit comprising:
- a first terminal coupled to the second terminal of the fifth transistor;
- and
- a second terminal coupled to the second terminal of the third transistor;
- and
- a sixth transistor comprising:
- a first terminal coupled to the second terminal of the power storage unit;
- a control unit configured to receive a sixth control signal;
- and
- a second terminal coupled to a second low voltage terminal;
- and
- a micro-controller coupled to the voltage detecting unit and the cell array and configured to control each transistor of the M cell packs of the cell array;
- wherein M is a positive integer greater than 1.
38 more elements
A power system, comprising:
- a power connector configured to receive at least one input voltage;
- a voltage detecting unit coupled to the power connector and configured to detect voltage levels of the at least one input voltage;
- a cell array coupled to the power connector and configured to save energy of the at least one input voltage, the cell array comprising M cell packs coupled in parallel, each cell pack comprising:
- a first transistor comprising:
- a first terminal;
- a control terminal configured to receive a first control signal;
- and
- a second terminal;
- a second transistor comprising:
- a first terminal coupled to the first terminal of the first transistor;
- a control terminal configured to receive a second control signal;
- and
- a second terminal;
- a third transistor comprising:
- a first terminal;
- a control signal configured to receive a third control signal;
- and
- a second terminal coupled to the second terminal of the second transistor;
- a fourth transistor comprising:
- a first terminal coupled to a second high voltage terminal;
- a control terminal configured to receive a fourth control signal;
- and
- a second terminal coupled to the second terminal of the first transistor;
- a fifth transistor comprising:
- a first terminal coupled to the second terminal of the fourth transistor;
- a control terminal configured to receive a fifth control signal;
- and
- a second terminal;
- a power storage unit comprising:
- a first terminal coupled to the second terminal of the fifth transistor;
- and
- a second terminal coupled to the second terminal of the third transistor;
- and
- a sixth transistor comprising:
- a first terminal coupled to the second terminal of the power storage unit;
- a control unit configured to receive a sixth control signal;
- and
- a second terminal coupled to a second low voltage terminal;
- and
- a micro-controller coupled to the voltage detecting unit and the cell array and configured to control each transistor of the M cell packs of the cell array;
- wherein M is a positive integer greater than 1.
38 more elements
Dependencies are inferred from the claim text.