Semiconductor memory device

A method of performing a write operation in a semiconductor memory device including memory cells, a sense amplifier connected to the memory cells, a first data latch that is connected to the sense amplifier and stores data of the memory cells, a second data latch that is connected to the sense amplifier and stores data of the memory cells, a third data latch that is connected to an input/output circuit, a fourth data latch that is connected to the input/output circuit, a first data bus of n-bit width that connects the sense amplifier, the first data latch, and the second data latch, and a second data bus of m-bit width that connects the third data latch and the fourth data latch to the first data bus, where m<n, said method comprising:

• storing write data received from the input/output circuit, in the third data latch and the fourth data latch;
• and
• during one cycle of a charge pump generating voltages required for writing and then recovering the charge pump:
• transferring the write data in the third data latch to the first data latch,
• transferring the write data in the fourth data latch to the second data latch, and
• programming the memory cells using the write data in the first and second data latches.

A method of performing a read operation in a semiconductor memory device including memory cells, a sense amplifier connected to the memory cells, a first data latch that is connected to the sense amplifier and stores data of the memory cells, a second data latch that is connected to the sense amplifier and stores data of the memory cells, a third data latch that is connected to an input/output circuit, a fourth data latch that is connected to the input/output circuit, a first data bus of n-bit width that connects the sense amplifier, the first data latch, and the second data latch, and a second data bus of m-bit width that connects the third data latch and the fourth data latch to the first data bus, where m<n, said method comprising:

• during one cycle of a charge pump generating voltages required for reading and then recovering the charge pump:
• reading the data from the memory cells into first and second data latches,
• transferring the read data in the first data latch to the third data latch, and
• transferring the read data in the second data latch to the fourth data latch;
• and
• transferring the read data in the third and fourth data latches to the input/output circuit.