Systems and Methods for Dynamically Programming a Flash Memory Device

A system, comprising:

• a plurality of flash memory cells;
• a write circuit operable to iteratively pulse write signals to a first of the memory cells;
• a read circuit operable to read the first memory cell after each pulsed write signal;
• and
• a controller operable to degrade data read from the first memory cell after each pulsed write signal, to determine when a data bit in the first memory cell reaches a threshold voltage based on the degraded data, and to direct the write circuit to stop pulsing the write signal to the first memory cell when the data bit in the first memory cell reaches the threshold voltage.