Max-log-map equivalence log likelihood ratio generation soft viterbi architecture system and method

A Viterbi detector comprising:

• an input terminal configured to receive a signal that represents a code word;
• a register;
• and
• a circuit coupled to the input terminal and to the register, the circuit configured to,
• calculate path lengths according to a first set of state-transition branches,
• update the path lengths more than once according to a second set of state-transition branches that is different than the first set of state-transition branches,
• update the path lengths according to a third set of state-transition branches that is different than the first and second sets of state-transition branches,
• recover the code word from the updated path lengths, and
• load the recovered code word into the register.

A method comprising:

• receiving a signal that represents a code word at an input terminal of a Viterbi detector;
• and
• operating a circuit of the Viterbi detector to
• calculate path lengths according to a first set of state-transition branches,
• update the path lengths more than once according to a second set of state-transition branches that is different than the first set of state-transition branches,
• update the path lengths according to a third set of state-transition branches that is different than the first and second sets of state-transition branches,
• recover the code word from the updated path lengths, and
• load the recovered code word, into a register of the Viterbi detector.

A disk-drive system comprising:

• a data-storage disk having a surface configured to store information values;
• a motor configured to rotate the data-storage disk;
• a read head configured to generate a read signal;
• a read-head positioning assembly configured to move the read head over the surface of the data-storage disk;
• and
• a Viterbi detector comprising a register and a circuit coupled to the read-head and the register, the circuit configured to
• calculate path lengths according to a first set of state-transition branches,
• update the path lengths more than once according to a second set of state-transition branches that is different than the first set of state-transition branches,
• update the path lengths according to a third set of state-transition branches that is different than the first and second sets of state-transition branches,
• recover the code word from the updated path lengths, and
• load the recovered code word into the register.