Dual power swing pipeline design with separation of combinational and sequential logics

A three-dimensional integrated circuit, comprising:

• a first tier of circuit elements, comprising:
• a first sequential logic element having a first sequential logic input, a first power supply input operable to receive a first power supply voltage, and a first sequential logic output;
• a second sequential logic element having a second sequential logic input, a second power supply input operable to receive the first power supply voltage, and a second sequential logic output;
• and
• a second tier of circuit elements, comprising:
• a combinational logic element having a combinational logic input coupled to the first sequential logic output of the first sequential logic element, a third power supply input operable to receive a second power supply voltage that is lower than the first power supply voltage, and a combinational logic output coupled to the second sequential logic input of the second sequential logic element.

A method of operating a three-dimensional integrated circuit having a plurality of tiers, the method comprising:

• supplying power at a first voltage to a first tier of the plurality of tiers;
• supplying power at a second voltage to a second tier of the plurality of tiers, wherein the second voltage is lower than the first voltage;
• shifting up a logic level from the second voltage to the first voltage for one or more sequential logic elements in the first tier;
• and
• shifting down the logic level from the first voltage to the second voltage for one or more combinational logic elements in the second tier.

A three-dimensional integrated circuit having a plurality of tiers, comprising:

• means for supplying power at a first voltage to a first tier of the plurality of tiers;
• means for supplying power at a second voltage to a second tier of the plurality of tiers, wherein the second voltage is lower than the first voltage;
• means for shifting up a logic level from the second voltage to the first voltage for one or more sequential logic elements in the first tier;
• and
• means for shifting down the logic level from the first voltage to the second voltage for one or more combinational logic elements in the second tier.