Input buffer circuit

An input buffer circuit, comprising:

• a first current source;
• a first differential control circuit, coupled to the first current source at a first couple terminal, configured to receive input signals and to generate a first bias voltage at the first couple terminal according to the input signals, and configured to generate first control signals according to the input signals;
• a second current source;
• a second differential control circuit, coupled to the second current source at a second couple terminal, configured to receive the input signals and to generate a second bias voltage at the second couple terminal according to the input signals, and configured to generate second control signals according to the input signals;
• a third current source, comprising a first terminal coupled to a first predetermined voltage level, and comprising a second terminal, wherein the third current source provides a first current according to the second bias voltage;
• a first differential output circuit, coupled to the second terminal of the first current source to receive the first current, configured to receive the first control signals to generate output signals;
• a fourth current source, comprising a first terminal, and comprising a second terminal coupled to the second predetermined voltage level, wherein the fourth current source drains a second current according to the first bias voltage;
• and
• a second differential output circuit, coupled to the first terminal of the fourth current source, configured to receive the second control signals to generate the output signal.