High Voltage Device with a Parallel Resistor

A device comprising:

• a transistor having a gate, a source, and a drain, wherein:
• the source and the drain are formed in a doped substrate and are separated by a drift region of the substrate, wherein the drift region includes both P-doped and N-doped portions;
• the gate is formed over the drift region and between the source and the drain;
• and
• the transistor is configured to handle high voltage conditions that are at least a few hundred volts;
• a dielectric structure formed between the source and the drain of the transistor, the dielectric structure protruding into and out of the substrate, wherein different parts of the dielectric structure have uneven thicknesses;
• and
• a resistor formed over the dielectric structure, the resistor having a plurality of winding segments that are substantially evenly spaced apart;
• wherein the resistor is electrically coupled to the gate of the transistor.

A semiconductor device comprising:

• a substrate;
• a drift region in the substrate, wherein the drift region includes doped regions with different types of conductivity;
• a dielectric isolation structure over the drift region;
• a gate of a transistor over the dielectric isolation structure;
• a resistor device over the dielectric isolation structure, wherein the resistor device includes a plurality of winding segments;
• a doped region in the substrate, wherein the doped region includes a first portion positioned adjacent to the gate, and an extension portion positioned under the isolation structure;
• and
• a source and drain in the substrate;
• wherein the resistor device and the gate are electrically coupled.