Power semiconductor device

A power semiconductor device having an active area, an interface area provided around a periphery of said active area, and an edge termination area provided around a periphery of said interface area, said power semiconductor device comprising:

• a semiconductor substrate having a first surface and a second surface opposite to said first surface, said first surface and said second surface each being located across said active area, said interface area, and said edge termination area, said semiconductor substrate including
• a drift region that is provided across said active area, said interface area, and said edge termination area and has a first conductivity type,
• a well region that is provided on said first surface, is at least partially included in said interface area, has an end portion on said first surface between said interface area and said edge termination area, and has a second conductivity type different from said first conductivity type,
• an extension region that extends outward from said well region on said first surface, is shallower than said well region, and has said second conductivity type, and
• a plurality of field-limiting rings that are provided on said first surface outside said extension region in said edge termination area and have said second conductivity type, said drift region being located on the inner side of each of said field-limiting rings on said first surface, each of said field-limiting rings together with said drift region located on the inner side forming at least one unit structure, said field-limiting ring located closer to the outside having a lower proportion of a width to a width of said unit structure on said first surface, said unit structure located closer to the outside having a lower average dose;
• a first electrode that is provided in said active area and contacts said first surface of said semiconductor substrate;
• and
• a second electrode contacting said second surface of said semiconductor substrate.