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US 2016/0260698 A1Published application
Semiconductor memory device
AssigneeSK hynix Inc.
InventorsSung Lae OH, Dae Sung EOM
Life of this patent
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Abstract
A semiconductor memory device to which a Peri Under Cell (PUC) structure is applied is disclosed. The semiconductor memory device includes a word line multilayered structure formed in a cell region, and extending from across the cell region; and a slimming region including a step-shaped pad structure in the word line multilayered structure.
Claims20
A semiconductor memory device comprising:
- a word line multilayered structure formed in a cell region, and extending across the cell region;
- and
- a slimming region including a step-shaped pad structure in the word line multilayered structure.
A semiconductor memory device comprising:
- a first word line multilayered structure in a cell region, and extending across the cell region;
- a first slimming region in the first word line multilayered structure;
- a second word line multilayered structure in the cell region, and extending across the cell region;
- and
- a second slimming region formed in the second word line multilayered structure.
2 more elements
A semiconductor memory device comprising:
- a cell region in which a word line multilayered structure is formed;
- a peripheral region arranged below the cell region;
- and
- a slimming region arranged in the cell region, suitable for coupling the cell region to the peripheral region, and including a pad structure formed by etching the word line multilayered structure of the cell region.
1 more element
Dependencies are inferred from the claim text.