Stacked Half-Bridge Package

A method for manufacturing a stacked half-bridge package, said method comprising:

• providing a control transistor having a control drain, a control source, and a control gate;
• providing a sync transistor having a sync drain, a sync source, and a sync gate;
• stacking said control and sync transistors on opposite sides of a common leadframe, said common leadframe serving as an output terminal by coupling said control source with said sync drain.

A method for manufacturing a stacked half-bridge package, said method comprising:

• providing a control GaN HEMT having a control drain, a control source, and a control gate;
• providing a sync GaN HEMT having a sync drain, a sync source, and a sync gate;
• stacking said control and sync GaN HEMTs on opposite sides of a common leadframe, said common leadframe serving as an output terminal by coupling said control source with said sync drain.