US 2016/0260682 A1 · FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICE

Abstract

A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.

Claims21

Dependent claims

A method of making a semiconductor device, comprising:

providing a temporary carrier comprising a semiconductor die mounting site;
forming a first portion of a conductive interconnect over the temporary carrier in a periphery of the semiconductor die mounting site;
forming an etch stop layer over the first portion of the conductive interconnect;
forming a second portion of the conductive interconnect over the etch stop layer and over the first portion of the conductive interconnect;
mounting a semiconductor die at the semiconductor die mounting site;
encapsulating the conductive interconnect and semiconductor die with a mold compound;
exposing a first end of the conductive interconnect on the second portion of the conductive interconnect;
forming a build-up interconnect structure to connect semiconductor die and the first ends of the conductive interconnect;
removing the temporary carrier to expose a second end of the conductive interconnect on the second portion of the conductive interconnect opposite the first end of the conductive interconnect;
and
etching the first portion of the conductive interconnect to expose the etch stop layer.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application

15/151,384Filed 10 May 2016

Priority

30 Dec 2011

Published

8 Sep 2016

Term ends

Not estimatedThe source records don’t support an estimate.

Classification59 codes

H10W 70/095
Of insulating or insulated package substrates, or of interposers, or of redistribution layers: of vias therein
H10P 54/00
Cutting or separating of wafers, substrates or parts of devices
H10P 72/74
For supporting or gripping: using temporarily an auxiliary support
H10W 20/031
Manufacture or treatment: of conductive parts of the interconnections

Family

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Application15/151,384Continuation in part

Application14/584,978Continuation