Semiconductor memory device and operation method thereof

Abstract

Disclosed are a semiconductor memory device and an operation method thereof. The semiconductor memory device includes a main buffer suitable for storing input data during a first operation period of a write operation, a repair operation unit suitable for selectively latching the input data based on whether the input data is used for repair during the first operation period of the write operation; a repair buffer suitable for storing the latched input data during a second operation period subsequent to the first operation period, and a column operation unit suitable for controlling an operation to write the input data stored in the main buffer or the repair buffer in a main memory cell or a repair memory cell during the second operation period of the write operation.

Dependencies are inferred from the claim text.