Non-volatile memory device, memory system, and methods of operating the device and system

A method of operating a memory system including a non-volatile memory device including a plurality of strings, each string including a plurality of memory cells vertically stacked on a substrate, and a memory controller configured to control the non-volatile memory device, the method comprising:

• transmitting an erase command and an erase address from the memory controller to the non-volatile memory device;
• performing an erase operation on memory cells corresponding to a plurality of string selection lines according to the erase address in response to the erase command and the erase address;
• performing an erase verification operation on first strings connected to a first string selection line from among the plurality of string selection lines;
• performing an erase verification operation on second strings connected to a second string selection line from among the plurality of string selection lines, when the first strings are erase-passed;
• and
• performing an erase operation again on the memory cells when the first strings are erase-failed,
• wherein the performing of the erase verification operation on the first strings comprises:
• applying an erase verification voltage to the first strings;
• and
• storing fail column information corresponding to a first fail string, which is erase-failed, from among the first strings.

A method executed by a non-volatile memory comprising a plurality of first strings, each of the first strings comprising a plurality of first memory cells commonly addressed by one of a plurality of bit lines and each of the first strings commonly addressed by a first string selection line and a different one of the plurality of bit lines, the method comprising:

• executing an erase operation on the first memory cells of the first strings addressed by the first string selection line and the bit lines;
• executing an erase-verification operation on the first memory cells of the first strings addressed by the first string selection line and the bit lines;
• and
• determining separately for each of the first strings commonly addressed by the first string selection line and a different one of the bit lines whether all first memory cells of the first string are erased, based upon the outcome of the executed erase-verification operation.