A read voltage setting method for a memory system including memory cells having plurality of logic states

A memory system comprising:

• a semiconductor cell array including a plurality of pages connected to a plurality of word lines, wherein each of the plurality of pages includes memory cells having a plurality of voltage states;
• and
• a controller suitable for acquiring a plurality of page data from a selected page by sequentially applying a plurality of test voltages between a minimum voltage level and a maximum voltage level, to a selected word line, detecting center voltages corresponding to at least some voltage states among the plurality of voltage states, based on the plurality of page data, setting read voltages based on the detected center voltages, and reading data stored in the selected page by applying the set read voltages to the selected word line,
• wherein the controller calculates sampling data corresponding to voltage ranges defined by the plurality of test voltages, based on the plurality of page data, and detects the center voltages in voltage ranges having greatest values of the sampling data in the corresponding voltage states.