Variable resistance memory device and verify method thereof
AssigneeKabushiki Kaisha Toshiba
InventorsKikuko SUGIMAE, Reika Ichihara
Life of this patent
Estimating the term…
Loading patent…
AssigneeKabushiki Kaisha Toshiba
InventorsKikuko SUGIMAE, Reika Ichihara
Estimating the term…
A resistance variable memory has a controller configured to control a voltage to be applied to the memory cell. The controller has a reset operation to bring the memory cell into a reset state, a first operation to apply a set voltage between the first wire and the second wire, a second operation to determine whether a current flowing to the memory cell to be set exceeds a first threshold when a first reading voltage is applied between the first wire and the second wire, a third operation to determine whether a current flowing to the memory cell to be set exceeds a second threshold when a second reading voltage is applied between the first wire and the second wire, and a fourth operation to apply a second reset voltage, between the first wire and the second wire.
A resistance variable memory, comprising:
A resistance variable memory comprising:
A verification method for a resistance variable memory, the resistance variable memory comprising:
Dependencies are inferred from the claim text.