Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorToshikazu Fukuda
Life of this patent
Estimating the term…
Abstract
According to one embodiment, a semiconductor memory device includes: a memory cell array including an SRAM cell; and a first voltage generator including first and second circuits. The first and second circuits include a diode-connected first transistor and a diode-connected second transistor, respectively. A driving capability of the first transistor is different from a driving capability of the second transistor. When the SRAM cell is in a standby state, the first voltage generator applies a second voltage or a third voltage to the SRAM cell via the first circuit or the second circuit.
Claims20
A semiconductor memory device comprising:
- a memory cell array including an SRAM (static random access memory) cell;
- a first power supply line applying a low-voltage-side power supply voltage to the SRAM cell;
- a second power supply line applying a high-voltage-side power supply voltage, which is higher than the low-voltage-side power supply voltage, to the SRAM cell;
- a first voltage generator applying a voltage to one of the first and second power supply lines;
- and
- a first interconnect applying a first voltage to the first voltage generator,
- wherein the first voltage generator includes;
- a first circuit;
- a second circuit;
- and
- a first switch circuit capable of switching between coupling of the first circuit between the one of the first and second power supply lines and the first interconnect and coupling of the second circuit between the one of the first and second power supply lines and the first interconnect,
- the first circuit includes a diode-connected first transistor coupled between the one of the first and second power supply lines and the first interconnect,
- the second circuit includes a diode-connected second transistor coupled between the one of the first and second power supply lines and the first interconnect,
- a driving capability of the first transistor is different from a driving capability of the second transistor,
- when the SRAM cell is in an operating state, the first voltage generator applies the first voltage to the one of the first and second power supply lines, and
- when the SRAM cell is in a standby state, the first voltage generator applies the first voltage to the one of the first and second power supply lines via the first circuit or the second circuit to apply a second voltage or a third voltage to the one of the first and second power supply lines.
A semiconductor memory device comprising:
- a memory cell array including an SRAM (static random access memory) cell;
- a first power supply line applying a low-voltage-side power supply voltage to the SRAM cell;
- a second power supply line applying a high-voltage-side power supply voltage which is higher than the low-voltage-side power supply voltage to the SRAM cell;
- a first voltage generator applying a voltage to one of the first and second power supply lines;
- and
- a first interconnect applying a first voltage to the first voltage generator,
- wherein the first voltage generator includes a first circuit;
- a second circuit;
- and
- a first switch circuit connectable the first circuit or the second circuit between the one of the first and second power supply lines and the first interconnect,
- the first circuit includes at least one diode-connected first transistor coupled between the one of the first and second power supply lines and the first interconnect,
- the second circuit includes at least one diode-connected second transistor coupled between the one of the first and second power supply lines and the first interconnect,
- a number of the first transistors provided in the first circuit is different from a number of second transistors provided in the second circuit,
- when the SRAM cell is in an operating state, the first voltage generator applies the first voltage to the one of the first and second power supply lines, and
- when the SRAM cell is in a standby state, the first voltage generator switches coupling of the first circuit or the second circuit to the one of the first and second power supply lines to apply a second voltage or a third voltage to the one of the first and second power supply lines.
Dependencies are inferred from the claim text.