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US 2016/0259676 A1Published application
Apparatus and method for detecting single flip-error in a complementary resistive memory
AssigneeIntel Corporation
InventorShigeki Tomishima
Life of this patent
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Abstract
Described is an apparatus which comprises: a complementary resistive memory bit-cell; a first sense amplifier coupled to the complementary resistive memory bit-cell via access devices; a second sense amplifier coupled to the first sense amplifier and to the complementary resistive memory bit-cell via the access devices, wherein the second sense amplifier is operable to detect an error in the complementary resistive memory bit-cell.
Claims20
An apparatus comprising:
- a complementary resistive memory bit-cell;
- a first sense amplifier coupled to the complementary resistive memory bit-cell via access devices;
- and
- a second sense amplifier coupled to the first sense amplifier and to the complementary resistive memory bit-cell via the access devices, wherein the second sense amplifier is operable to detect an error in the complementary resistive memory bit-cell.
1 more element
A system comprising:
- a processor;
- a memory coupled to the processor, the memory including:
- an array of complementary resistive memory bit-cells;
- a first sense amplifier coupled to at least one of the complementary resistive memory bit-cells of the array via access devices;
- and
- a second sense amplifier coupled to the first sense amplifier and to the at least one of the complementary resistive memory bit-cells via the access devices, wherein the second sense amplifier is operable to output a pre-determined value when any of the memory bit-cells in the at least one complementary resistive memory bit-cell flips;
- and
- a wireless interface for allowing the processor to communicate with another device.
5 more elements
A method comprising:
- reading an array of complementary resistive memory bit-cells;
- providing an output of a first sense amplifier which is coupled to the array via access devices;
- providing an output of a second sense amplifier which is coupled to the first sense amplifier and to the array via the access devices;
- and
- identifying a location of error by processing the output generated by the second amplifier.
2 more elements
Dependencies are inferred from the claim text.