Integrated circuit with on-chip power profiling

A method comprising:

• during a first test run, coupling a circuit block under test of a circuit, to a first power supply network of the circuit, and uncoupling the circuit block under test from a second power supply network of the circuit;
• during a second test run, uncoupling the circuit block under test from the first power supply network, and coupling the circuit block under test to the second power supply network, wherein a first plurality of other circuit blocks are coupled to the first power supply network during the first and second test runs and a second plurality of other circuit blocks are coupled to the second power supply network during the first and second test runs;
• and
• determining a power consumption of the circuit block under test based on the first and second test runs.

A system comprising:

• an integrated circuit including:
• a first power supply network coupled to a first supply pin;
• a second power supply network that is different from the first power supply network, the second power supply network coupled to a second supply pin to receive a second power supply;
• a first plurality of circuit blocks coupled to the first power supply network during a first test run and a second test run;
• a second plurality of circuit blocks coupled to the second power supply network during the first and second test runs;
• and
• a circuit block under test coupled to the first power supply network by one or more power switches;
• and
• a test circuit coupled to the integrated circuit, the test circuit to:
• control the one or more power switches to couple the circuit block under test to the first power supply network during the first test run;
• control the one or more power switches to uncouple the circuit block under test from the first power supply network during the second test run;
• and
• determine a power consumption of the circuit block under test based on the first and second test runs.