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US 2016/0259392 A1Published application
Mapping A Performance Request To An Operating Frequency In A Processor
AssigneeIntel Corporation
InventorsEliezer Weissmann, Efraim Rotem, Paul Diefenbaugh, Guy Therien, Nir Rosenzweig
Life of this patent
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Abstract
In an embodiment, a processor includes multiple cores each to independently execute instructions and a power control unit (PCU) coupled to the plurality of cores to control power consumption of the processor. The PCU may include a mapping logic to receive a performance scale value from an operating system (OS) and to calculate a dynamic performance-frequency mapping based at least in part on the performance scale value. Other embodiments are described and claimed.
Claims21
(canceled)
An apparatus comprising:
- a first processor including a first plurality of cores;
- a second processor including a second plurality of cores;
- and
- a power controller to control power consumption of the first processor and the second processor, the power controller including:
- a first logic
- to receive performance level information,
- to use a table to map the performance level information to a target operating frequency for at least the first processor based at least in part on the performance level information, and
- to adjust the target operating frequency based at least in part on at least one first processor constraint;
- and
- a frequency control logic to cause the first processor to operate at the adjusted target operating frequency.
7 more elements
An apparatus comprising:
- first processor means including a first plurality of cores;
- second processor means including a second plurality of cores;
- and
- power control means for controlling power consumption of the first processor means and the second processor means, the power control means including:
- means for receiving performance level information,
- means for mapping the performance level information to a target operating frequency for at least the first processor means based at least in part on the performance level information,
- means for adjusting the target operating frequency based at least in part on at least one first constraint, and
- means for causing the first processor means to operate at the adjusted target operating frequency.
5 more elements
A system comprising:
- a processor having a first plurality of cores, a second plurality of cores, and a controller to control power consumption of the first plurality of cores and the second plurality of cores, the controller including a first logic to receive performance level information, to use a table to map the performance level information to a target operating frequency for at least a first one of the first plurality of cores based at least in part on the performance level information, and to adjust the target operating frequency based at least in part on a first constraint, the controller further including a frequency control logic to cause the at least first one of the plurality of first cores to operate at the adjusted target operating frequency;
- a dynamic random access memory (DRAM) coupled to the processor;
- an audio device;
- and
- a wireless transceiver.
2 more elements
Dependencies are inferred from the claim text.