Fin field effect transistor (finfet) device structure with ge-doped inter-layer dielectric (ild) structure

A fin field effect transistor (FinFET) device structure, comprising:

• a substrate;
• a fin structure extending above the substrate;
• a gate structure transversely overlying the fin structure, wherein the gate structure has structure a top portion and bottom portion, the top portion of the gate structure has vertical sidewalls, and the bottom portion has sloped sidewalls;
• a source/drain (S/D) structure formed adjacent to the gate structure;
• and
• an inter-layer dielectric (ILD) structure formed adjacent to the gate structure, wherein the inter-layer dielectric (ILD) structure has a gradient germanium (Ge) concentration.

A method for forming a fin field effect transistor (FinFET) device structure, comprising:

• receiving a substrate;
• forming a fin structure on the substrate;
• forming an isolation structure on the substrate, wherein the fin structure is embedded in the isolation structure;
• forming a dummy gate structure on a middle portion of the fin structure;
• forming a source/drain (S/D) structure adjacent to the dummy gate structure;
• forming an inter-layer dielectric (ILD) structure formed adjacent to the dummy gate structure, wherein the ILD structure has a gradient germanium (Ge) concentration;
• removing the dummy gate structure to form a trench;
• removing a portion of the ILD structure to enlarge a width of a bottom portion of the trench;
• and
• filling a gate structure into the trench.