V-shaped sige recess volume trim for improved device performance and layout dependence
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChao-Hsuing Chen, Ling-Sung Wang, Chi-Yen Lin
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChao-Hsuing Chen, Ling-Sung Wang, Chi-Yen Lin
Estimating the term…
Some embodiments of the present disclosure relates to a method of forming a transistor device having a strained channel and an associated device. In some embodiments, the method is performed by performing a first etch of a substrate to produce a recess having a largest width at an opening along a top surface of the substrate. An etch stop layer is formed by doping a bottom surface of the recess with a dopant. A second etch of the recess is then performed to form a source/drain recess, wherein the etch stop layer resists etching of the second etch. A stress inducing material is formed within the source/drain recess onto the etch stop layer.
A method of recess formation, comprising:
A method of forming a semiconductor device, comprising:
A semiconductor device, comprising:
Dependencies are inferred from the claim text.