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US 2016/0254265 A1Published application
Three-dimensional devices having reduced contact length
AssigneeMicron Technology, Inc.
InventorToru Tanzawa
Life of this patent
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Abstract
Various embodiments comprise apparatuses and methods including a memory array having alternating levels of semiconductor materials and dielectric material with strings of memory cells formed on the alternating levels. One such apparatus includes a memory array formed substantially within a cavity of a substrate. Peripheral circuitry can be formed adjacent to a surface of the substrate and adjacent to the memory array. Additional apparatuses and methods are described.
Claims1
A method of forming an apparatus, the method comprising:
- forming a cavity in a substrate;
- forming the three-dimensional circuit substantially within the cavity, the cavity having a depth substantially equivalent to a height of the three-dimensional circuit;
- and
- forming support circuitry adjacent to the cavity and proximate to a surface of the substrate, an upper surface of the support circuitry being substantially coplanar with an upper surface of the three-dimensional circuit.
1 more element
Dependencies are inferred from the claim text.