Multi-Layer Metal Contacts
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Feng Shieh, Wen-Hung Tseng, Chih-Ming Lai, Ken-Hsien Hsieh, Tsai-Sheng Gau, Ru-Gun Liu
Life of this patent
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Abstract
A method for forming metal contacts within a semiconductor device includes forming a first-layer contact into a first dielectric layer that surrounds at least one gate electrode, the first-layer contact extending to a doped region of an underlying substrate. The method further includes forming a second dielectric layer over the first dielectric layer and forming a second-layer contact extending through the second dielectric layer to the first-layer contact.
Claims20
A method comprising:
- forming a hard mask layer directly on opposing sidewalls of a gate electrode that is disposed over a substrate;
- forming a first dielectric layer over the gate electrode;
- forming a second dielectric layer over the hard mask layer and the first dielectric layer;
- forming a trench extending through the second dielectric layer, the first dielectric layer, and the hard mask layer, wherein the hard mask layer defines a sidewall of the trench while physically contacting the opposing sidewalls of the gate electrode;
- forming a first contact in the trench;
- forming a third dielectric layer over the first dielectric layer;
- and
- forming a second contact extending through the second dielectric layer to the first contact.
A method comprising:
- forming a hard mask layer directly on opposing sidewalls of a gate electrode that is disposed over a substrate;
- forming a first dielectric layer over the gate electrode;
- forming a second dielectric layer over the hard mask layer and the first dielectric layer;
- forming a trench extending through the second dielectric layer, the first dielectric layer, and the hard mask layer, wherein the hard mask layer defines a sidewall of the trench while physically contacting the opposing sidewalls of the gate electrode;
- and
- forming a first contact in the trench.
A method comprising:
- forming a gate electrode over a substrate, the gate electrode having opposing sidewalls and a top surface extending between the opposing sidewalls;
- forming a hard mask layer directly on the opposing sidewalls and the top surface of the gate electrode such that the hard mask layer physically contacts the opposing sidewalls and the top surface of the gate electrode;
- forming a first dielectric layer over the gate electrode and a doped region disposed in the substrate;
- forming a second dielectric layer over the gate electrode and the doped region disposed in the substrate;
- forming a trench extending through the second dielectric layer, the hard mask layer, and the first dielectric layer such that the hard mask layer defines a sidewall of the trench while physically contacting the opposing sidewalls of the gate electrode;
- and
- forming a first conductive feature in the trench.
Dependencies are inferred from the claim text.