Memory Controller Supporting Nonvolatile Physical Memory

A memory system comprising:

• a nonvolatile memory having a plurality of nonvolatile access units each specified by a respective nonvolatile-access-unit address;
• a volatile memory having a plurality of volatile access units, each volatile access unit specified by a respective volatile-access-unit address;
• and
• a memory controller coupled to the nonvolatile memory and the volatile memory, the memory controller maintaining, in the volatile memory, a table identifying whether data in the volatile access units has been written to the nonvolatile access units.

A memory-access method for a memory system with physical memory that includes a plurality of volatile access units addressed by a corresponding plurality of volatile-storage addresses and a plurality of nonvolatile access units addressed by a corresponding plurality of nonvolatile-storage addresses, the method comprising:

• maintaining, in the volatile access units, a table relating the volatile access units storing data to corresponding ones of the nonvolatile access units storing the same data, the volatile access units including a first volatile access unit storing first data and a first nonvolatile access unit, related to the first volatile access unit in the table, storing the first data;
• writing second data to the first volatile access unit without writing the second data to the first nonvolatile access unit;
• and
• setting a dirty bit, in the volatile access units, identifying the first volatile access unit as dirty.

A computer-readable medium having stored thereon a data structure having information defining at least a portion of an integrated-circuit memory controller, the data structure comprising:

• first data representing a first connection to couple to a cache memory of volatile access units with volatile access units specified by respective volatile-access-unit addresses;
• second data representing a second connection to couple to a nonvolatile memory with nonvolatile access units specified by respective nonvolatile-access-unit addresses;
• and
• third data representing a memory controller coupled to the nonvolatile memory and the volatile memory, the memory controller maintaining, in the volatile access units, a table identifying whether data in the volatile access units has been written to the nonvolatile access units.