Random number generator

A processing device, comprising:

• a random number generator, comprising:
• an oscillator arrangement comprising a first oscillator and a second oscillator, wherein the oscillator arrangement is configured such that a predetermined output state of the second oscillator triggers a transition of the first oscillator from a first oscillation speed to a second oscillation speed and a predetermined output state of the first oscillator triggers a transition of the first oscillator from the second oscillation speed to the first oscillation speed;
• a counter circuit configured to count the number of clock cycles of at least one of the first oscillator or the second oscillator between two transitions of the first oscillator from the first oscillation speed to the second oscillation speed;
• and
• an output circuit configured to output a random number based on the counted number of clock cycles;
• wherein the processing device is configured to perform a secure operation based on the output random number.

A random number generator, comprising:

• a first oscillator and a second oscillator,
• wherein the second oscillator is configured to trigger a transition of the first oscillator from a first oscillation speed to a second oscillation speed when the second oscillator is in a predefined output state;
• wherein the first oscillator is configured to trigger a transition of the first oscillator from the second oscillation speed to the first oscillation speed when the first oscillator is in a predefined output state;
• a counter circuit configured to count the number of clock cycles of at least one of the first oscillator or the second oscillator between two transitions of the first oscillator from the first oscillation speed to the second oscillation speed;
• and
• an output circuit configured to output a random bit sequence based on the counted number of clock cycles.