Tsv testing method and apparatus
AssigneeTexas Instruments Incorporated
InventorLee D. Whetsel
Life of this patent
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Abstract
An integrated circuit die includes a substrate of semiconductor material having a top surface, a bottom surface, and an opening through the substrate between the top surface and the bottom surface. A through silicon via (TSV) has a conductive body in the opening, has a top contact point coupled to the body at the top surface, and has a bottom contact point coupled to the body at the bottom surface. A scan cell has a serial input, a serial output, control inputs, a voltage reference input, a response input coupled to one of the contact points, and a stimulus output coupled to the other one of the contact points.
Claims4
An integrated circuit die comprising:
- (a) a substrate of semiconductor material having a top surface, a bottom surface, and a first opening through the substrate between the top surface and the bottom surface;
- (b) a first through silicon via having a first conductive body in the opening, having a first top contact point coupled to the first body at the top surface, and having a first bottom contact point coupled to the first body at the bottom surface;
- and
- (c) a first scan cell including:
- i. comparator circuitry having a first voltage reference input, a first response input coupled to one of the first top contact point and the first bottom contact point, and a comparator output;
- ii. a multiplexer having an input connected to the comparator output, a first serial input, a control input, and a multiplexer output;
- and
- iii. a flip-flop having an input connected to the multiplexer input, a first scan clock input, and a first serial output that is coupled to the other one of the first top contact point and the first bottom contact point.
Dependencies are inferred from the claim text.