Fully i/q balanced quadrature radio frequency mixer with low noise and low conversion loss

A method of mixing radio frequency signals, comprising:

• switching, via a first switching module, a differential input signal based on a first phased half duty cycle clock signal and a second phased half duty cycle clock signal to generate first switching outputs;
• switching, via the first switching module, the differential input signal based on a third phased half duty cycle clock signal and a fourth phased half duty cycle clock signal to generate second switching outputs;
• and
• generating, via a second switching module, a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port by switching the first switching outputs based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal and switching the second switching outputs based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal.

A radio frequency mixer, comprising:

• a first switching module configured to receive first, second, third, and fourth phased half duty cycle clock signals, wherein the first switching module is configured to:
• switch a differential input signal based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal to generate first switching outputs,
• switch the differential input signal based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal to generate second switching outputs,
• switch the differential input signal based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal to generate third switching outputs, and
• switch the differential input signal based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal to generate fourth switching outputs;
• and
• a second switching module configured to receive the first second, third, and fourth phased half duty cycle clock signals, wherein the second switching module is configured to generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port by being configured to:
• switch the first switching outputs based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal,
• switch the second switching outputs based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal,
• switch the third switching outputs based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal, and
• switch the fourth switching outputs based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal.

A method of mixing radio frequency signals, comprising:

• receiving, via a first switching module, first, second, third, and fourth phased half duty cycle clock signals;
• switching, via the first switching module:
• a differential input signal based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal to generate first switching outputs,
• the differential input signal based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal to generate second switching outputs,
• the differential input signal based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal to generate third switching outputs, and
• the differential input signal based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal to generate fourth switching outputs;
• receiving, via a second switching module, the first, second, third, and fourth phased half duty cycle clock signals;
• and
• generating, via the second switching module, a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port by switching:
• the first switching outputs based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal,
• the second switching outputs based on the first phased half duty cycle clock signal and the second phased half duty cycle clock signal,
• the third switching outputs based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal, and
• the fourth switching outputs based on the third phased half duty cycle clock signal and the fourth phased half duty cycle clock signal.