Board terminal and board connector
AssigneesAutonetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
InventorsHajime Watanabe, Yasushi Saitoh, Yoshifumi Saka
Life of this patent
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Abstract
A board terminal 1 includes a base material 11 made of a metal material and a plating film 12 covering a surface of the base material 11. The plating film 12 includes an outermost layer 120 having a Sn mother phase 120a and Sn—Pd-based alloy phases 120b dispersed in the Sn mother phase 120a, the Sn mother phase 120a and the Sn—Pd-based alloy phases 120b being present on an outer surface. A Pd content in the outermost layer 120 is not more than 7 atomic %. A board connector 2 includes the board terminal 1 and a housing 20 for holding the board terminal 1.
Claims9
A board terminal, comprising:
- a base material made of a metal material;
- and
- a plating film covering a surface of the base material;
- wherein:
- the plating film includes an outermost layer having a Sn mother phase and Sn—Pd-based alloy phases dispersed in the Sn mother phase, the Sn mother phase and the Sn—Pd-based alloy phases being present on an outer surface;
- the outermost layer is formed by performing a reflow process after a Pd plating layer having a thickness of not smaller than 10 nm and smaller than 20 nm and a Sn plating layer having a thickness of not smaller than 1 μm and not larger than 2 μm are successively formed,
- the outermost layer has a Pd content of not more than 7 atomic %, and
- the outermost layer is in contact with an inner layer having a double layer structure composed of a Ni layer in contact with the base material and a Ni—Sn alloy layer in contact with the Ni layer or is in contact with the base material.
A board terminal manufacturing method, comprising:
- a step of forming a plating film covering a surface of a base material made of a metal material by performing a reflow process after a Pd plating layer having a thickness of not smaller than 10 nm and smaller than 20 nm and a Sn plating layer having a thickness of not smaller than 1 μm and not larger than 2 μm are successively formed on the surface of the base material or forming a plating film covering the surface of the base material by successively forming the Pd plating layer and the Sn plating layer on the surface of the base material and performing the reflow process,
- wherein:
- the plating film includes an outermost layer having a Sn mother phase and Sn—Pd-based alloy phases dispersed in the Sn mother phase, the Sn mother phase and the Sn—Pd-based alloy phases being present on an outer surface,
- the outermost layer has a Pd content of not more than 7 atomic %,
- the outermost layer is in contact with an inner layer having a double layer structure composed of a Ni layer in contact with the base material and a Ni—Sn alloy layer in contact with the Ni layer or is in contact with the base material.
Dependencies are inferred from the claim text.