Semiconductor device manufacturing method and semiconductor device
AssigneeRenesas Electronics Corporation
InventorsKinya OHTANI, Yasuhiro NISHIMURA
Life of this patent
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Abstract
In order to improve the performance of a semiconductor device, a p type impurity is ion implanted into an area of an n type semiconductor film that is epitaxially grown over a p type semiconductor substrate, and the p type impurity is not ion implanted into an area of the n type semiconductor film, which is adjacent to the area in which the p type impurity is ion implanted. In this way, a p− type drift layer comprised of the area in which the p type impurity is introduced, as well as an n− type semiconductor region comprised of the area in which the p type impurity is not introduced are formed.
Claims14
A semiconductor device manufacturing method comprising the steps of:
- (a) preparing a p type semiconductor substrate;
- (b) epitaxially growing an n type semiconductor film over the semiconductor substrate;
- (c) implanting ions of a p type first impurity into a first area of the semiconductor film and not implanting ions of the first impurity into a second area of the semiconductor film, the second area being adjacent to the first area, to form a p type first semiconductor region comprised of the first area in which the first impurity is introduced, as well as an type second semiconductor region comprised of the second area in which the first impurity is not introduced;
- (d) forming a first groove that reaches the middle of the first semiconductor region from the upper surface of the semiconductor film;
- (e) forming a gate insulating film in an inner wall of the first groove;
- (f) forming a gate electrode over the gate insulating film so as to fill the first groove;
- (g) forming an n type third semiconductor region in the upper part of the first semiconductor region as well as the upper part of the second semiconductor region;
- (h) forming a p type fourth semiconductor region in the upper part of the third semiconductor region;
- (i) forming a source electrode contacting the third and fourth semiconductor regions;
- and
- (j) forming a drain electrode electrically coupled to the semiconductor substrate,
- wherein a transistor is formed by the first semiconductor region, the third semiconductor region, the fourth semiconductor region, the gate insulating film, and the gate electrode.
A semiconductor device comprising:
- a p type semiconductor substrate;
- a p type first semiconductor region formed over the semiconductor substrate;
- an n type second semiconductor region formed adjacent to the first semiconductor region over the semiconductor substrate;
- an n type third semiconductor region formed over the first semiconductor region and over the second semiconductor region;
- a p type fourth semiconductor region formed over the third semiconductor region;
- a first groove reaching the first semiconductor region, after passing through the fourth semiconductor region and through the third semiconductor region;
- a gate insulating film formed in an inner wall of the first groove;
- a gate electrode formed over the first gate insulating film so as to fill the first groove;
- a source electrode contacting the third semiconductor region and the fourth semiconductor region;
- and
- a drain electrode electrically coupled to the semiconductor substrate;
- wherein a transistor is formed by the first semiconductor region, the third semiconductor region, the fourth semiconductor region, the gate insulating film, and the gate electrode,
- wherein the first semiconductor region and the second semiconductor region are formed by implanting ions of a p type first impurity into a first area of an n type semiconductor film that is epitaxially grown over the semiconductor substrate, and by not implanting ions of the first impurity into a second area of the semiconductor film, the second area being adjacent to the first area,
- wherein the first semiconductor region is comprised of the first area in which the first impurity is introduced, and
- wherein the second semiconductor region is comprised of the second area in which the first impurity is not introduced.
Dependencies are inferred from the claim text.