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US 2016/0240610 A1Published application
Junction interlayer dielectric for reducing leakage current in semiconductor devices
AssigneeInternational Business Machines Corporation
InventorsJoel P. de Souza, Keith E. Fogel, Jeehwan Kim, Devendra K. Sadana, Brent A. Wacaser
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Abstract
A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. A dielectric interlayer is formed on the p-doped layer. An n-type layer is formed on the dielectric interlayer, the n-type layer including a high band gap II-VI material to form an electronic device.
Claims20
A semiconductor device, comprising:
- a substrate;
- a p-doped layer including a doped III-V material on the substrate;
- a continuous dielectric interlayer formed on the p-doped layer;
- and
- an n-type layer formed on the dielectric interlayer, the n-type layer including a high band gap II-VI material to form an electronic device.
2 more elements
A field effect transistor device, comprising:
- a substrate;
- a p-doped layer including a doped III-V material on the substrate;
- an ultrathin dielectric interlayer formed on the p-doped layer and having a thickness of less than 1.3 nm;
- an n-type layer formed on the dielectric interlayer, the n-type layer including an aluminum doped ZnO material to form a source region and/or drain region of the field effect transistor device;
- and
- a contact formed on the n-type layer.
3 more elements
(canceled)
A method for forming a semiconductor device, comprising:
- forming a p-doped layer including a doped III-V material on a substrate;
- forming a continuous dielectric interlayer on the p-doped layer;
- forming an n-type layer including a high band gap II-VI material on the dielectric layer;
- and
- processing the n-type layer to form a device.
2 more elements
Dependencies are inferred from the claim text.