Resistance-based memory with auxiliary redundancy information

A data storage device comprising:

• a resistance-based memory, wherein the resistance-based memory includes a first set of storage elements and a second set of storage elements;
• and
• a controller coupled to the resistance-based memory, wherein the controller is configured to cause a codeword to be stored into the first set of storage elements, wherein the codeword represents data to be stored, wherein the codeword includes first redundancy information associated with the data, wherein the controller is further configured to cause auxiliary redundancy information associated with the data to be stored into the second set of storage elements, and wherein the controller is further configured to cause the auxiliary redundancy information to be discarded from the second set of storage elements while the first redundancy information is retained at the first set of storage elements.

A data storage device comprising:

• a resistive random access memory (ReRAM), wherein the ReRAM includes a first storage region and a second storage region;
• and
• a controller coupled to the ReRAM, wherein the controller is configured to cause a codeword to be stored into the ReRAM, wherein the codeword represents data to be stored at the first storage region, wherein the codeword includes first parity bits, wherein the controller is further configured to cause auxiliary parity bits associated with the data to be stored at the second storage region, and wherein the controller is further configured to cause the auxiliary parity bits to be erased from the second storage region while the first parity bits are retained at the first storage region.