Shift register and display device
AssigneeSharp Kabushiki Kaisha
InventorsHiroyuki OHKAWA, Shige FURUTA, Yuhichiroh MURAKAMI
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AssigneeSharp Kabushiki Kaisha
InventorsHiroyuki OHKAWA, Shige FURUTA, Yuhichiroh MURAKAMI
Estimating the term…
A shift register includes a plurality of unit circuits connected in cascade, each of the unit circuits including: a first output transistor having a current path connected between an output terminal and a clock terminal, the clock terminal being configured to be supplied with a first clock signal; a second output transistor having a current path connected between the output terminal and a predetermined potential node; a setting unit configured to set a signal level of the output terminal to a predetermined signal level in a case where a control signal is active; a first output controller configured to turn off the first output transistor in response to the control signal in the case where the control signal is active, supply a control electrode of the first output transistor with an input signal in response to one of a second clock signal in a case where the control signal is inactive; and a second output controller configured to turn off the second output transistor in the case where the control signal is active.
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