Tft array substrate structure

A thin-film transistor (TFT) array substrate structure, comprising:

• first and second gates, a semiconductor layer arranged on the first and second gates, first and second sources arranged on the semiconductor layer, and first and second drains arranged on the semiconductor layer, the first and second gates being electrically connected, the first and second sources being electrically connected, the first gate and the first drain being arranged to overlap in space so as to form a first overlapping zone, the second gate and the second drain being arranged to overlap in space so as to form a second overlapping zone, the first gate having a first edge corresponding to the first overlapping zone, the second gate having a second edge corresponding to the second overlapping zone, the first edge and the first drain intersecting in space in an inclined manner, the second edge and the second drain intersecting in space in an inclined manner, so that when the first and second drains are moved relative to the first and second gates, areas of the first overlapping zone and the second overlapping zone undergo change in the same direction;
• wherein when the first and second drains are moved relative to the first and second gates, the areas of the first overlapping zone and the second overlapping zone undergo identical change;
• wherein the inclination of the first edge with respect to the first drain is in a direction that is opposite to a direction of the inclination of the second edge with respect to the second drain;
• wherein the first drain has a portion corresponding to the first overlapping zone and in the form of a strip and the second drain has a portion corresponding to the second overlapping zone and in the form of a strip, the two strips being respectively in directions that are perpendicular;
• wherein the first drain has a width W1 corresponding to the first overlapping zone and the second drain has a width W2 corresponding to the second overlapping zone, the first edge and the first drain defining an acute included angle α1=arccot(W2/W1), the second edge and the second drain defining an acute included angle α2=arccot(W1/W2);
• wherein the first source is in the form of a U-shape having an upward-facing opening and the second source is in the form of a U-shape having a rightward-facing opening, the first source having a right portion connected to a left portion of the second source;
• wherein the first drain extends into the U-shaped opening of the first source and the second drain extends into the U-shaped opening of the second source;
• and
• wherein the TFT array substrate structure is applicable to a vertical alignment type liquid crystal display panel.