Array substrate and liquid crystal display panel using same

A liquid crystal display panel, comprising:

• an array substrate, a color filter substrate laminated to the array substrate, and a liquid crystal layer arranged between the array substrate and the color filter substrate, the array substrate comprising:
• a glass substrate, a gate terminal formed on the glass substrate, a gate insulation layer formed on the gate terminal and the glass substrate, source/drain terminals formed on the gate insulation layer, an oxide semiconductor layer formed on the source/drain terminals and the gate insulation layer, a protective layer formed on the oxide semiconductor layer, the source/drain terminals, and the gate insulation layer, a color filter formed on the protective layer, a planarization layer formed on the color filter and the protective layer, and a pixel electrode formed on the planarization layer, the pixel electrode being electrically connected to the source/drain terminals, the pixel electrode comprising an arrangement of lines that forms a radiating structure surrounding a center defined by a cross-shaped structure.

A liquid crystal display panel, comprising:

• an array substrate, a color filter substrate laminated to the array substrate, and a liquid crystal layer arranged between the array substrate and the color filter substrate, the array substrate comprising:
• a glass substrate, a gate terminal formed on the glass substrate, a gate insulation layer formed on the gate terminal and the glass substrate, source/drain terminals formed on the gate insulation layer, an oxide semiconductor layer formed on the source/drain terminals and the gate insulation layer, a protective layer formed on the oxide semiconductor layer, the source/drain terminals, and the gate insulation layer, a color filter formed on the protective layer, a planarization layer formed on the color filter and the protective layer, and a pixel electrode formed on the planarization layer, the pixel electrode being electrically connected to the source/drain terminals, the pixel electrode comprising an arrangement of lines that forms a radiating structure surrounding a center defined by a cross-shaped structure;
• wherein the gate insulation layer comprises a recess formed thereon to correspond to the oxide semiconductor layer and the oxide semiconductor layer covers the source/drain terminals and the recess.