Semiconductor memory device and method for manufacturing the same

A semiconductor memory device comprising:

• a substrate;
• a first stacked body and a second stacked body provided to be adjacent to each other on the substrate, and including a plurality of control gate electrodes and a plurality of insulating films, each of the plurality of control gate electrodes and each of the plurality of insulating films being alternately stacked in a stacking direction;
• a first selection gate electrode provided on the first stacked body;
• a second selection gate electrode and a third selection gate electrode provided on the second stacked body;
• a first semiconductor pillar provided in the first selection gate electrode and the first stacked body, extending in a stacking direction of the first selection gate electrode and the first stacked body;
• a second semiconductor pillar provided in the second stacked body and the second selection gate electrode, extending in the stacking direction;
• a third semiconductor pillar provided in the second stacked body and the third selection gate electrode, extending in the stacking direction;
• memory films provided between the plurality of control gate electrodes and the first semiconductor pillar, between the plurality of control gate electrodes and the second semiconductor pillar, and between the plurality of control gate electrodes and third semiconductor pillar;
• an average width of a region between a first selection gate electrode and the second selection gate electrode in a first direction being larger than an average width of a region between the second selection gate electrode and the third selection gate electrode in the first direction.

A method of manufacturing a semiconductor memory device, the method comprising:

• forming a stacked body by alternately stacking a control gate electrode and an insulating film alternately on a substrate;
• forming a plurality of first semiconductor pillars extending in a stacking direction of the control gate electrode, the insulating film and the stacked body;
• forming, in a part between the first semiconductor pillars within the stacked body, a first slit penetrating the stacked body in the stacking direction and extending in a first direction orthogonal to the stacking direction;
• forming a first member within the first slit;
• forming a selection gate electrode on the stacked body;
• forming a second semiconductor pillar extending in the stacking direction, penetrating the selection gate electrode and connected to the first semiconductor pillar;
• forming, on the selection gate electrode, a mask member in which a first opening portion extending in the first direction is formed in an area directly above the first slit and in which a second opening portion extending in the first direction is formed in a region other than the area directly above the first slit;
• forming, by performing etching by using the mask member as a mask, a second slit penetrating the selection gate electrode in the stacking direction in an area directly above the first opening portion and forming, in an area directly above the second opening portion, a third slit which penetrates the selection gate electrode in the stacking direction and which has an average width smaller than an average width of the second slit;
• removing, via the second slit, the first member from an interior of the first slit;
• and
• embedding an insulating material within the first slit, the second slit and the third slit.