US 2015/0311328 A1Published application

Semiconductor device and fabrication method of semiconductor device

AssigneesNational Institute of Advanced Industrial Science and Technology, Fuji Electric Co., Ltd.

InventorsManabu Takei, Yoshiyuki Yonezawa

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Abstract

A semiconductor device includes semiconductor layers of a first conductivity-type and a second conductivity-type stacked on a silicon carbide semiconductor and having differing impurity concentrations. Trenches disposed penetrating the semiconductor layer of the second conductivity-type form a planar striped pattern; and a gate electrode is disposed therein through a gate insulation film. First and second semiconductor regions respectively of the first and the second conductivity-types have impurity concentrations exceeding that of the semiconductor layer of the second conductivity-type and are selectively disposed therein. The depth of the second semiconductor region exceeds that of the semiconductor layer of the second conductivity-type, but not that of the trenches. The second semiconductor region is arranged at given intervals along the length of the trenches. In the silicon carbide semiconductor below the trench bottoms, a third semiconductor region of the second conductivity-type and having a floating potential is disposed covering the trench bottoms.

Claims4

Dependent claims

A semiconductor device comprising:

a first semiconductor layer of a first conductivity type and formed of a silicon carbide semiconductor;
a second semiconductor layer of the first conductivity type and formed of the silicon carbide semiconductor having an impurity concentration higher than that of the first semiconductor layer, the second semiconductor layer being disposed on one face of the first semiconductor layer;
a third semiconductor layer of the first conductivity type and formed of the silicon carbide semiconductor having an impurity concentration higher than that of the second semiconductor layer, the third semiconductor layer being disposed on a face that with respect to a first semiconductor layer side of the second semiconductor layer, is on an opposite aspect of the second semiconductor layer;
a fourth semiconductor layer of the second conductivity type and formed of the silicon carbide semiconductor, the fourth semiconductor layer being disposed on a face that with respect to a first semiconductor layer side of the third semiconductor layer, is on an opposite aspect of the third semiconductor layer;
a first semiconductor region of the first conductivity type and selectively disposed inside the fourth semiconductor layer;
a plurality of trenches that respectively penetrate the fourth semiconductor layer and the first semiconductor region in a depth direction orthogonal to the one face of the first semiconductor layer, the plurality of trenches being disposed at predetermined intervals in a first direction parallel to the one face of the first semiconductor layer, the plurality of trenches extending in a second direction orthogonal to the first direction and parallel to the one face of the first semiconductor layer to form stripes;
a gate electrode that is disposed inside each trench through a gate insulation film;
a second semiconductor region of the second conductivity type, having an impurity concentration higher than that of the fourth semiconductor layer, and selectively disposed inside the fourth semiconductor layer, the second semiconductor region having a depth deeper than that of the fourth semiconductor layer and shallower than that of the plurality of trenches;
a third semiconductor region of the second conductivity type that is disposed to cover a bottom portion of the plurality of trenches;
a fifth semiconductor layer of the second conductivity type and disposed on the other face of the first semiconductor layer;
an emitter electrode that is in contact with the first semiconductor region and the second semiconductor region;
and
a collector electrode that is in contact with the fifth semiconductor layer.

10 more elements

A fabrication method of a semiconductor device, the fabrication method comprising:

forming on a first semiconductor layer of a first conductivity type and formed of a silicon carbide semiconductor, a second semiconductor layer of the first conductivity type and formed of a silicon carbide semiconductor having an impurity concentration higher than that of the first semiconductor layer;
forming on the second semiconductor layer, a third semiconductor layer of the first conductivity type and formed of the silicon carbide semiconductor having an impurity concentration higher than that of the second semiconductor layer;
forming on the third semiconductor layer, a fourth semiconductor layer of the second conductivity type and formed of the silicon carbide semiconductor;
forming a second semiconductor region of the second conductivity type and having an impurity concentration higher than that of the fourth semiconductor layer, the second semiconductor region being formed inside the fourth semiconductor layer at a depth deeper than a depth of the fourth semiconductor layer and in a planar pattern extending in stripes in a first direction parallel to one face of the first semiconductor layer;
forming a plurality of trenches at a depth deeper than a depth of the second semiconductor region, the plurality of trenches being formed in stripes extending in a second direction orthogonal to the first direction and parallel to the one face of the first semiconductor layer, and penetrating the fourth semiconductor layer in a depth direction orthogonal to the one face of the first semiconductor layer;
forming a third semiconductor region of the second conductivity type, in a semiconductor portion exposed in a bottom portion of each trench among the plurality of trenches;
forming inside each trench, a gate electrode through a gate insulation film;
forming in the fourth semiconductor layer, a first semiconductor region of the first conductivity type in a portion sandwiched between adjacent trenches;
forming a fifth semiconductor layer of the second conductivity type on the other face of the first semiconductor layer;
forming an emitter electrode in contact with the first semiconductor region and the second semiconductor region;
and
forming a collector electrode in contact with the fifth semiconductor layer.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/674,861Filed 31 Mar 2015
Priority: JP 2014-09213225 Apr 2014
Published: 29 Oct 2015
Term ends: Not estimatedThe source records don’t support an estimate.

Classification4 codes

H10D 12/481
Having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions: having gate…
H10D 12/038
Of vertical IGBTs: having a recessed gate, e.g. trench-gate IGBTs
H10D 62/8325
Being Group IV materials comprising two or more elements, e.g. SiGe: silicon carbide
H10D
Inorganic electric semiconductor devices