Multi-gate vdmos transistor

A multi-gate vertical double-diffused metal-oxide-semiconductor (VDMOS) transistor, comprising:

• a substrate having a first surface and a second surface opposite to the first surface;
• a drift layer on the first surface of the substrate;
• an epitaxial layer on the drift layer;
• a plurality of trenches, each trench of the plurality of trenches passing through the epitaxial layer and a thickness portion of the drift layer;
• a plurality of gate structures, each gate structure of the plurality of gate structures substantially entirely filling the each trench, an arrangement of the plurality of gate structures has a polygonal shape or a concentric circular shape by connecting centers of the plurality of gate structures;
• a plurality of doped regions in the epitaxial layer having a conductivity type opposite to the epitaxial layer, each doped region of the plurality of doped regions surrounding a top portion of a sidewall of the each gate structure of the plurality of gate structures, such that each gate structure of two adjacent gate structures has a first half of the top portion of the sidewall surrounded by each doped region of the plurality of doped regions, and a second half of the top portion of the sidewall exposed to the epitaxial layer, and two doped regions of the plurality of doped regions are located between the two adjacent gate structures in a cross section vertical to the first surface or the second surface of the substrate;
• a source metal layer on a planar surface of the epitaxial layer, the source metal layer electrically connecting the plurality of doped regions;
• and
• a drain metal layer on the second surface of the substrate.