Thin film transistor array substrate and fabricating method thereof

A thin film transistor array substrate comprising:

• a gate line and a data line formed on a substrate, the gate and data lines crossing each other;
• a gate insulation film formed between the gate and data lines;
• a gate electrode formed at an intersection of the gate and data lines;
• an active layer formed on the gate insulation film to overlap the gate electrode;
• an etch stop layer formed on the active layer to define a channel region of the active layer;
• and
• a source electrode and a drain electrode formed on the active layer to partially overlap the active layer,
• wherein the etch stop layer is between the source and drain electrodes, and the source and drain electrodes are spaced apart from the etch stop layer,
• the source electrode and the drain electrode include a first electrode layer and a second electrode layer disposed on the first electrode, and
• the first electrode layer is formed from a dry-etchable material and the second electrode layer is formed from a wet-etchable material.