Non-Volatile Semiconductor Storage Device

A non-volatile semiconductor memory device comprising a memory cell including a memory transistor having a single-layer gate structure having a floating gate and a switch transistor having a single-layer gate structure having a switch gate electrode, wherein

• the memory cell has a configuration in which a source line is connected to one end of the memory transistor while a bit line is connected to one end of the switch transistor, the other end of the memory transistor and the other end of the switch transistor are electrically connected to each other, and the memory transistor and the switch transistor are arranged in series, and
• the memory transistor includes a high-resistance region having a higher resistance value between a region below the floating gate and a source-drain region at the other end electrically connected to the switch transistor than a resistance value between the region below the floating gate and a source-drain region at the one end.