Cache control device having fault-tolerant function and method of operating the same
AssigneeElectronics and Telecommunications Research Institute
InventorsJin Ho HAN, Young Su KWON
Life of this patent
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AssigneeElectronics and Telecommunications Research Institute
InventorsJin Ho HAN, Young Su KWON
Estimating the term…
The cache control device having the fault-tolerant function includes a cache memory configured to store first data with respect to a specific address read from a main memory, and generate and store a first parity bit corresponding to the first data, a shadow cache memory configured to store second data with respect to the specific address, and generate and store a second parity bit corresponding to the second data, and a fault detector configured to perform a parity check operation on the data of the specific address and the parity bit stored in at least one of the cache memory and the shadow cache memory when receiving a data read request with respect to the specific address from a processor, and transmit the data stored in a non-erroneous memory to the processor according to a result of the parity check operation.
A cache control device having a fault-tolerant function, comprising:
A method of preventing a fault of a cache control device, comprising:
Dependencies are inferred from the claim text.