High level instructions with lower-level assembly code style primitives within a memory appliance for accessing memory

A method comprising:

• receiving, over a communication protocol, a memory related command from a client system, said receiving performed by a processor of a memory appliance, said processor operable to communicate with said client system via said communication protocol over a network;
• translating said memory related command into a plurality of commands more primitive than said memory related command, said translating performed by said processor;
• storing said plurality of commands more primitive than said memory related command into a first queue;
• and
• reading said plurality of commands more primitive than said memory related command from said first queue and executing said plurality of commands more primitive than said memory related command on data stored in said plurality of memory devices, said reading performed by a memory unit controller of said memory appliance that is configured to manage said plurality of memory devices;
• executing said plurality of commands more primitive than said memory related command by said memory unit controller on said data stored in said plurality of memory devices to produce a result;
• and
• notifying said processor of said result.

A memory subsystem for processing memory related commands received over a bus of a communication protocol from a client system, said memory subsystem comprising:

• a processor operable to interface with said communication protocol to receive and translate a first memory related command into a plurality of commands more primitive than said memory related command, wherein said plurality of commands more primitive than said memory related command comprises data manipulation operations on data stored in at least one data structures;
• a plurality of memory devices;
• and
• a memory unit controller coupled to said plurality of memory devices, and operable to execute said plurality of commands more primitive than said memory related command on data stored in said plurality of memory devices to produce a result, wherein said processor is further operable to establish a direct memory transfer of said result over said communication protocol to a network.