Generating simd code from code statements that include non-isomorphic code statements

A computer program product to generate SIMD code from code statements that include non-isomorphic code statements, the computer program product comprising one or more computer-readable tangible storage devices and program instructions stored on at least one of the one or more computer-readable tangible storage devices, the program instructions comprising:

• program instructions to receive, by one or more processors, a plurality of code statements, each code statement having one or more operators in a respective operator order, each operator having a type and associated operands, at least two code statements of the plurality of code statements having an operator of the same type in a different operator order position;
• program instructions to identify, by the one or more processors, a first operator order position for the operators of the same type in each of the at least two code statements;
• for each of the at least two code statements, program instructions to generate, by the one or more processors, code for operators and their associated operands having operator order positions preceding the first operator order positions;
• and
• program instructions to generate, by the one or more processors, SIMD code at least based on the identified first operator order positions, the corresponding operator type, and the operands associated with the operator type at the identified operator order positions.

A computer system to generate SIMD code from code statements that include non-isomorphic code statements, the computer system comprising one or more processors, one or more computer readable memories, one or more computer readable tangible storage devices, and program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories, the program instructions comprising:

• program instructions to receive, by one or more processors, a plurality of code statements, each code statement having one or more operators in a respective operator order, each operator having a type and associated operands, at least two code statements of the plurality of code statements having an operator of the same type in a different operator order position;
• program instructions to identify, by the one or more processors, a first operator order position for the operators of the same type in each of the at least two code statements;
• for each of the at least two code statements, program instructions to generate, by the one or more processors, code for operators and their associated operands having operator order positions preceding the first operator order positions;
• and
• program instructions to generate, by the one or more processors, SIMD code at least based on the identified first operator order positions, the corresponding operator type, and the operands associated with the operator type at the identified operator order positions.