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AssigneeUniversity of Massachusetts
InventorsWayne P. Burleson, Vikram Belur Suresh
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A mechanism is provided for a circuit for generation of a random output. A bistable circuit has two stable states as an output and a clock signal as an input. The bistable circuit includes a first logic circuit and a second logic circuit cross-coupled connected together, which transition into a metastable state before resolving to the two stable states. The second logic circuit resolves to a stable state at a resolution time. A digitization circuit is configured to generate random bits corresponding to a variance of the resolution time of the second logic circuit resolving from the metastable state to the stable state for cycles of the clock signal. The resolution time randomly varies according to noise. An actual value of the stable state is eliminated as factor in generating the random bits.
A circuit for generation of a random output, the circuit comprising:
A method for generation of a random output, the method comprising:
A computer program product, tangibly embodied on a computer readable medium, for generation of a random output, the computer program product including instructions that, when executed by a processor, cause the processor to perform operations comprising:
Dependencies are inferred from the claim text.