System and Method for Independent, Direct and Parallel Communication Among Multiple Field Programmable Gate Arrays
AssigneePico Computing, Inc.
InventorsGregory M. Edvenson, Corey B. Olson
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AssigneePico Computing, Inc.
InventorsGregory M. Edvenson, Corey B. Olson
Estimating the term…
Representative embodiments are disclosed for data transfer between field programmable gate arrays (FPGAs). A representative system includes: a PCIe communication network comprising a PCIe switch and a plurality of PCIe communication lines; a host computing system coupled to the PCIe communication network; a nonblocking crossbar switch; a plurality of memory circuits; and a plurality of field programmable gate arrays, each field programmable gate array configurable for a plurality of data transfers to and from the host computing system and any other field programmable gate array of the plurality of field programmable gate arrays, with each data transfer including a designation of a first memory address, a file size, and a stream number. Once base DMA registers have been initialized for a selected application, no further involvement by the host computing system is involved for the duration of the selected application.
A system couplable to a host computing system, the system comprising:
A system comprising:
A system comprising:
A method of data transfer in a system, the system comprising a host computing system, a PCIe communication network, a nonblocking crossbar switch, a plurality of memory circuits, and a plurality of field programmable gate arrays, the method comprising:
Dependencies are inferred from the claim text.