Time estimating method, memory storage device, and memory controlling circuit unit

A memory storage device, comprising:

• a connection interface unit configured to couple to a host system;
• a rewritable non-volatile memory module comprising a plurality of memory cells;
• and
• a memory controlling circuit unit coupled to the connection interface unit and the rewritable non-volatile memory module, and configured to write first data into a plurality of first memory cells of the memory cells, and read the first memory cells according to a reading voltage, so as to determine whether each of the first memory cells belongs to a first state or a second state,
• wherein the memory controlling circuit unit is configured to calculate a first quantity of the first memory cells belonging to the first state, and obtain first time information of the rewritable non-volatile memory module according to the first quantity.

A memory controlling circuit unit, for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of memory cells, and the memory controlling circuit unit comprises:

• a host interface configured to couple to a host system;
• a memory interface configured to couple to the rewritable non-volatile memory module;
• and
• a memory management circuit coupled to the host interface and the memory interface, and configured to write first data into a plurality of first memory cells of the memory cells, and read the first memory cells according to a reading voltage, so as to determine whether each of the first memory cells belongs to a first state or a second state,
• wherein the memory management circuit is configured to calculate a first quantity of the first memory cells belonging to the first state, and obtain first time information of the rewritable non-volatile memory module according to the first quantity.