Eliminating or reducing programming errors when programming flash memory cells

A method for programming flash cells of a flash memory device, the method comprising:

• in a host system, sending write data to be programmed in flash cells to a solid state drive (SSD) device interfaced with the host system, the host system including at least a host processor and a host memory device, the SSD device including at least an SSD controller and at least one nonvolatile memory (NVM), the NVM including at least a first flash memory having a plurality of flash cells for storing data, the first flash memory including reference voltage determination logic, the SSD controller including at least one SSD processor and at least one buffer;
• in the SSD controller, receiving the write data from the host system;
• in the SSD controller, buffering the write data in the buffer, the buffered write data comprising at least a first most significant bit (MSB) page of data and at least a first least significant bit (LSB) page of data;
• in the SSD controller, sending at least the first LSB page of data to the first flash memory and maintaining a copy of the first LSB page of data in a temporary memory;
• in the first flash memory, programming at least the first LSB page of data in a first LSB page of flash cells of the first flash memory;
• in the SSD controller, sending the copy of the first LSB page of data to the first flash memory;
• in the SSD controller, sending the first MSB page of data to the first flash memory;
• and
• in the reference voltage determination logic of the first flash memory, using the copy of the first LSB page of data and the first MSB page of data to determine reference voltage ranges to be programmed into a first MSB page of the flash cells of the first flash memory.

A computer program comprising computer instructions for execution by one or more processors of a controller of a solid state drive (SSD) device of a data storage system, the computer instructions being stored on a non-transitory computer-readable medium, the computer instructions comprising:

• a first set of instructions for receiving write data in the controller sent from a host system;
• a second set of instructions for buffering the write data in a buffer of the controller, the buffered write data comprising at least a first most significant bit (MSB) page of data and at least a first least significant bit (LSB) page of data;
• a third set of instructions for sending at least the first LSB page of data to the first flash memory;
• a fourth set of instructions for maintaining a copy of the first LSB page of data in a temporary memory;
• and
• a fifth set of instructions for sending the copy of the first LSB page of data and the first MSB page of data to a first flash memory after the third set of instructions has sent at least the first LSB page of data to the first flash memory.